CMOS Time-Mode Circuits and Systems: Fundamentals and by Fei Yuan

By Fei Yuan

Time-mode circuits, the place details is represented via time distinction among electronic occasions, supply a plausible and technology-friendly capability to achieve mixed-mode circuits and structures in nanometer complementary metal-oxide semiconductor (CMOS) applied sciences. quite a few architectures of time-based sign processing and layout options of CMOS time-mode circuits have emerged; notwithstanding, an in-depth exam of the rules of time-based sign processing and layout options of time-mode circuits has no longer been available―until now.

CMOS Time-Mode Circuits and structures: basics and Applications is the 1st ebook to convey a entire remedy of CMOS time-mode circuits and structures. that includes contributions from major specialists, this authoritative textual content features a wealthy selection of literature on time-mode circuits and systems.

The ebook starts by means of offering a severe comparability of voltage-mode, current-mode, and time-mode signaling for mixed-mode sign processing and then:

  • Covers the basics of time-mode sign processing, equivalent to voltage-to-time converters, all-digital phase-locked loops, and frequency synthesizers
  • Investigates the functionality features, structure, layout ideas, and implementation of time-to-digital converters
  • Discusses time-mode delta-sigma-based analog-to-digital converters, putting a superb emphasis on time-mode quantizers
  • Includes an in depth learn of ultra-low-power built-in time-mode temperature size systems

CMOS Time-Mode Circuits and structures: basics and Applications presents a helpful reference for circuit layout engineers, method engineers, graduate scholars, and others trying to grasp this fast-evolving field.

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Additional info for CMOS Time-Mode Circuits and Systems: Fundamentals and Applications

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Gera and D. Hoe. An evaluation of CMOS adders in deep sub-micron processes. In Proceedings of Southeastern Symposium on System Theory, 2012, Jacksonville, FL, pp. 126–129. )>>B. Jonsson. On CMOS scaling and A/D converter performance. In Proceedings of NORCHIP, 2010, Tampere, Finland, pp. 1–4. )>>F. Yuan. CMOS Current-Mode Circuits for Data Communications. Springer, New York, 2006. )>> R. Staszewski, K. Muhammad, D. Leipold, C. Hung, Y. Ho, J. Wallberg, C. Fernando et al. All-digital TX frequency synthesizer and discrete-time receiver for Bluetooth radio in 130-nm CMOS.

To simplify analysis, we again neglect the effect of channel length modulation. When Rs is absent, we have iDS 3 = kn3 ( vin - VT ) . 17 for iDS3 yield iDS 3 = 1 é1 + 2kn3 ( vin - VT ) ùû 2kn3 Rs2 ë ± ëé1 + 2kn3 (vin - VT ) ùû - 4kn23 Rs2 ( vin - VT ) . 18. 21 Voltage-to-Time Converters The residual charge of the parasitic capacitor Cs, which consists of the gate-source capacitance and source-substrate junction capacitance of M3, as well as the parasitic capacitance of Rs, exists at the end of the discharge phase.

Frequency domain yields its data to phase-locked synthesizer. Electronics, 27:107–113, April 1978. )>> V. Reinhardt. Spur reduction technique in direct digital synthesizer. In Proceedings of 47th Frequency Control Symposium, October 1993, Salt Lake City, UT, pp. 230–241. )>> T. Riley, M. Copeland, and T. Kwanieski. Delta-sigma modulation in fractional-N frequency synthesis. IEEE Journal of Solid-State Circuits, 28(5):553–559, 1991. )>> C. Hsu, M. Straayer, and M. Perrott. 6-GHz digital ΔΣ fractional-N frequency synthesizer with a noise-shaping time-to-digital converter and quantization noise cancellation.

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