By Somnath Paul
This ebook analyzes strength and reliability as significant demanding situations confronted by means of designers of computing frameworks within the nanometer know-how regime. The authors describe the prevailing strategies to handle those demanding situations after which display a brand new reconfigurable computing platform, which leverages high-density nanoscale reminiscence for either information garage and computation to maximise the energy-efficiency and reliability. The power and reliability merits of this new paradigm are illustrated and the layout demanding situations are mentioned. a variety of and software program points of this intriguing computing paradigm are defined, rather with admire to hardware-software co-designed frameworks, the place the unit could be reconfigured to imitate different software habit. eventually, the energy-efficiency of the paradigm defined is in comparison with different, famous reconfigurable computing platforms.
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Extra resources for Computing with Memory for Energy-Efficient Robust Systems
L. Gustafson, “Reevaluating Amdahl’s Law”. ACM Comm. 31(5), 532–533 (1988) 2. [Online], “Future processing : Extreme scale”. pdf 3. pdf 34 3 Motivation for a Memory-Based Computing Hardware 4. H. Singh, M. Lee, G. J. Kurdahi, N. M. Chaves Filho, “MorphoSys: an integrated reconfigurable system for data-parallel and computation-intensive applications”. IEEE Trans. Comput. 49(5), 465–481 (2000) 5. C. Goldstein, H. Schmit, M. Moe, M. Budiu, S. R. Taylor, R. Laufer, “PipeRench: A Coprocessor for Streaming Multimedia Acceleration”, in Intl.
The RAW Benchmark Suite: Computation Structures for General Purpose Computing”, in FPGAs for Custom Computing Machines, 1997 19. M. , “SPLASH: A Reconfigurable Linear Logic Array”, in Intl. Conference on Parallel Processing, 1990 20. R. Hauser, J. Wawrzynek, “Garp: a MIPS Processor with a Reconfigurable Coprocessor”, in FPGAs for Custom Computing Machines, 1997 21. D. Chen, J. Rabaey, “Reconfigurable multi-processor IC for rapid prototyoing of algorithmspecific high-speed datapaths”. IEEE J.
Online], “FPGAs Provide Reconfigurable DSP Solutions”. pdf 44. [Online], “DSP Co-Processing in FPGAs: Embedding High-Performance, Low-Cost DSP Functions”. pdf 45. L. Cheng, P. Wong, F. Li, Y. Lin, L. He, “Device and Architecture Cooptimization for FPGA Power Reduction”, in DAC, 2005 46. J. J. Francis, D. Lewis, P. Chow, “Architecture of field programmable gate arrays: The effect of logic functionality on area efficiency”. IEEE J. Solid State Circ. 25(5), 1217–1225 (1990) 47. E. Ahmed, J. Rose, “The effect of LUT and cluster size on deep submicron FPGA performance and density”.